This invention relates, in general, to wire bonding methods for integrated circuits, and more particularly, to a stress-isolating wire bond for stress sensitive integrated circuits.
As integrated circuits become more complex and incorporate a larger number and wider variety of devices, the circuits become more stress sensitive. Increasing complexity further complicates packaging and actually increases package stress applied to an integrated circuit chip. In particular, silicon strain gauge devices such as pressure sensors and accelerometers are designed to be stress sensitive, thus are particularly affected by packaging stresses. Also, large integrated circuit chips such as memories and microprocessors have a large number of wire bonds, making them more sensitive to wire bond induced stresses. Stress sensitive circuits are effected even more by flip-chip solder bump bonding, which is a leading replacement for conventional wire bonding techniques.
In addition to stress sensitivity, conventional wire bonds are subject to stress caused by chip motion during temperature cycling. Chip motion is even more severe in pressure sensor devices which are mounted with rubber or RTV die bonds. Chip motion can lead to early wire failure as the wire is repeatedly stressed and bent during operation.
Until now, wire bonds were made directly to an upper surface of the integrated circuit. This was necessary because most wire bond techniques require pressure to be applied between the wire and the integrated circuit to form a reliable bond. What is needed is an ability to firmly apply pressure during the wire bond operation, while releasing that pressure after wire bond in a manner which isolates the integrated circuit die from wire bond stresses.